The SOT-23 SMT package (‘SOT’ meaning ‘small outline transistor’), for instance, is used in very small surface-mount transistors with three or more pins and measures 3 mm by 1.75 mm by 1.3 mm. However, components such as tantalum and ceramic capacitors usually have slightly different package sizes, per the EIA specifications as follows.ĭiodes and transistors come in special packages with different dimensions to that of other passives.
The surface-mount technology package sizes above apply to passives that have a rectangular construction, such as resistors, capacitors, and inductors. The table below outlines, from smallest to largest, the physical dimensions for standard SMD packages. Per industry specifications, passive surface-mount components fall into several packages of varying sizes. SMD Packaging Sizes for Passive Components Like JEDEC, the EIA is a coalition of leading electronic component manufacturers.Ī closeup of a printed circuit board with passive surface-mount components.
JEDEC (which was originally known as the Joint Electron Device Engineering Council) provides specifications for electronic components, including SMDs (such as the best practices for surface-mount device fabrication, packaging, and handling).ĮIA- the Electronic Industries Alliance develops standards and policies for surface-mount components in the electronics and electrical industry via its EIA Standards Committee.
JEDEC- the JEDEC Solid State Technology Association is a semiconductor trade and standards organisation comprising 300 member companies, including key players within the microelectronics industry. The most recognised standards organisations in the industry are JEDEC and EIA, which are introduced below. sizing) of surface mount components to simplify assembly and mounting. Surface-mount technology (SMT) packaging standards help to standardise the physical dimensions (i.e. Packaging Standards in the Electronic Components Industry
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